Open-source GPU could push computing power to the next level


Nvidia | Mythbusters Demo GPU versus CPU

Binghamton University researchers have developed Nyami, a synthesizable graphics processor unit (GPU) architectural model for general-purpose and graphics-specific workloads, and have run a series of experiments on it to see how different hardware and software configurations would affect the circuit’s performance.

Binghamton University computer science assistant professor Timothy Miller said the results will help other scientists make their own GPUs and “push computing power to the next level.”

GPUs are typically found on commercial video or graphics cards inside of a computer or gaming console. The specialized circuits have computing power designed to make images appear smoother and more vibrant on a screen. There has recently been a movement to see if the chip can also be applied to non-graphical computations, such as algorithms processing large chunks of data.

GPU programming model “unfamiliar”

Maxwell, Nvidia’s most powerful GPU architecture (credit: Nvidia)

“In terms of performance per Watt and performance per cubic meter, GPUs can outperform CPUs by orders of magnitude on many important workloads,” the researchers note in an open-access paper by Miller and other authors in International Symposium on Performance Analysis of Systems and Software (Jeff Bush, the director of software engineering at Roku, was lead author).

“The adoption of GPUs into HPC [high-performance computing] has therefore been both a major boost in performance and a shift in how supercomputers are programmed. Unfortunately, this shift has suffered slow adoption because the GPU programming model is unfamiliar to those who are accustomed to writing software for traditional CPUs.”

This slow adoption was a result of GPU manufacturers’ decision to keep their chip specifications secret, said Miller. “That prevented open source developers from writing software that could utilize that hardware. Nyami makes it easier for other researchers to conduct experiments of their own, because they don’t have to reinvent the wheel. With contributions from the ‘open hardware’ community, we can incorporate more creative ideas and produce an increasingly better tool.

“The ramifications of the findings could make processors easier for researchers to work with and explore different design tradeoffs. We can also use [Nyami] as a platform for conducting research that isn’t GPU-specific, like energy efficiency and reliability,” he added.


Abstract of Nyami: a synthesizable GPU architectural model for general-purpose and graphics-specific workloads

Graphics processing units (GPUs) continue to grow in popularity for general-purpose, highly parallel, high-throughput systems. This has forced GPU vendors to increase their focus on general purpose workloads, sometimes at the expense of the graphics-specific workloads. Using GPUs for general-purpose computation is a departure from the driving forces behind programmable GPUs that were focused on a narrow subset of graphics rendering operations. Rather than focus on purely graphics-related or general-purpose use, we have designed and modeled an architecture that optimizes for both simultaneously to efficiently handle all GPU workloads. In this paper, we present Nyami, a co-optimized GPU architecture and simulation model with an open-source implementation written in Verilog. This approach allows us to more easily explore the GPU design space in a synthesizable, cycle-precise, modular environment. An instruction-precise functional simulator is provided for co-simulation and verification. Overall, we assume a GPU may be used as a general-purpose GPU (GPGPU) or a graphics engine and account for this in the architecture’s construction and in the options and modules selectable for synthesis and simulation. To demonstrate Nyami’s viability as a GPU research platform, we exploit its flexibility and modularity to explore the impact of a set of architectural decisions. These include sensitivity to cache size and associativity, barrel and switch-on-stall multithreaded instruction scheduling, and software vs. hardware implementations of rasterization. Through these experiments, we gain insight into commonly accepted GPU architecture decisions, adapt the architecture accordingly, and give examples of the intended use as a GPU research tool.

Memory capacity of brain is 10 times more than previously thought

In a computational reconstruction of brain tissue in the hippocampus, Salk and UT-Austin scientists found the unusual occurrence of two synapses from the axon of one neuron (translucent black strip) forming onto two spines on the same dendrite of a second neuron (yellow). Separate terminals from one neuron’s axon are shown in synaptic contact with two spines (arrows) on the same dendrite of a second neuron in the hippocampus. The spine head volumes, synaptic contact areas (red), neck diameters (gray) and number of presynaptic vesicles (white spheres) of these two synapses are almost identical. (credit: Salk Institute)

Salk researchers and collaborators have achieved critical insight into the size of neural connections, putting the memory capacity of the brain far higher than common estimates. The new work also answers a longstanding question as to how the brain is so energy efficient, and could help engineers build computers that are incredibly powerful but also conserve energy.

“This is a real bombshell in the field of neuroscience,” says Terry Sejnowski, Salk professor and co-senior author of the paper, which was published in eLife. “We discovered the key to unlocking the design principle for how hippocampal neurons function with low energy but high computation power. Our new measurements of the brain’s memory capacity increase conservative estimates by a factor of 10 to at least a petabyte (1 quadrillion or 1015 bytes), in the same ballpark as the World Wide Web.”

“When we first reconstructed every dendrite, axon, glial process, and synapse* from a volume of hippocampus the size of a single red blood cell, we were somewhat bewildered by the complexity and diversity amongst the synapses,” says Kristen Harris, co-senior author of the work and professor of neuroscience at the University of Texas, Austin. “While I had hoped to learn fundamental principles about how the brain is organized from these detailed reconstructions, I have been truly amazed at the precision obtained in the analyses of this report.”

10 times more discrete sizes of synapses discovered

The Salk team, while building a 3D reconstruction of rat hippocampus tissue (the memory center of the brain), noticed something unusual. In some cases, a single axon from one neuron formed two synapses reaching out to a single dendrite of a second neuron, signifying that the first neuron seemed to be sending a duplicate message to the receiving neuron.

At first, the researchers didn’t think much of this duplicity, which occurs about 10 percent of the time in the hippocampus. But Tom Bartol, a Salk staff scientist, had an idea: if they could measure the difference between two very similar synapses such as these, they might glean insight into synaptic sizes, which so far had only been classified in the field as small, medium and large.

To do this, researchers used advanced microscopy and computational algorithms they had developed to image rat brains and reconstruct the connectivity, shapes, volumes and surface area of the brain tissue down to a nanomolecular level.

The scientists expected the synapses would be roughly similar in size, but were surprised to discover the synapses were nearly identical.

Salk scientists computationally reconstructed brain tissue in the hippocampus to study the sizes of connections (synapses). The larger the synapse, the more likely the neuron will send a signal to a neighboring neuron. The team found that there are actually 26 discrete sizes that can change over a span of a few minutes, meaning that the brain has a far great capacity at storing information than previously thought. Pictured here is a synapse between an axon (green) and dendrite (yellow). (credit: Salk Institute)

“We were amazed to find that the difference in the sizes of the pairs of synapses were very small, on average, only about eight percent different in size. No one thought it would be such a small difference. This was a curveball from nature,” says Bartol.

Because the memory capacity of neurons is dependent upon synapse size, this eight percent difference turned out to be a key number the team could then plug into their algorithmic models of the brain to measure how much information could potentially be stored in synaptic connections.

It was known before that the range in sizes between the smallest and largest synapses was a factor of 60 and that most are small.

But armed with the knowledge that synapses of all sizes could vary in increments as little as eight percent between sizes within a factor of 60, the team determined there could be about 26 categories of sizes of synapses, rather than just a few.

“Our data suggests there are 10 times more discrete sizes of synapses than previously thought,” says Bartol. In computer terms, 26 sizes of synapses correspond to about 4.7 “bits” of information. Previously, it was thought that the brain was capable of just one to two bits for short and long memory storage in the hippocampus.

“This is roughly an order of magnitude of precision more than anyone has ever imagined,” says Sejnowski.

What makes this precision puzzling is that hippocampal synapses are notoriously unreliable. When a signal travels from one neuron to another, it typically activates that second neuron only 10 to 20 percent of the time.

“We had often wondered how the remarkable precision of the brain can come out of such unreliable synapses,” says Bartol. One answer, it seems, is in the constant adjustment of synapses, averaging out their success and failure rates over time. The team used their new data and a statistical model to find out how many signals it would take a pair of synapses to get to that eight percent difference.

The researchers calculated that for the smallest synapses, about 1,500 events cause a change in their size/ability (20 minutes) and for the largest synapses, only a couple hundred signaling events (1 to 2 minutes) cause a change.

“This means that every 2 or 20 minutes, your synapses are going up or down to the next size. The synapses are adjusting themselves according to the signals they receive,” says Bartol.

“Our prior work had hinted at the possibility that spines and axons that synapse together would be similar in size, but the reality of the precision is truly remarkable and lays the foundation for whole new ways to think about brains and computers,” says Harris. “The work resulting from this collaboration has opened a new chapter in the search for learning and memory mechanisms.” Harris adds that the findings suggest more questions to explore, for example, if similar rules apply for synapses in other regions of the brain and how those rules differ during development and as synapses change during the initial stages of learning.

“The implications of what we found are far-reaching,” adds Sejnowski. “Hidden under the apparent chaos and messiness of the brain is an underlying precision to the size and shapes of synapses that was hidden from us.”

A model for energy-efficient computers

The findings also offer a valuable explanation for the brain’s surprising efficiency. The waking adult brain generates only about 20 watts of continuous power—as much as a very dim light bulb. The Salk discovery could help computer scientists build powerful and ultraprecise, but energy-efficient, computers, particularly ones that employ “deep learning” and artificial neural nets—techniques capable of sophisticated learning and analysis, such as speech, object recognition and translation.

“This trick of the brain absolutely points to a way to design better computers,” says Sejnowski. “Using probabilistic transmission turns out to be as accurate and require much less energy for both computers and brains.”

Other authors on the paper were Cailey Bromer of the Salk Institute; Justin Kinney of the McGovern Institute for Brain Research; and Michael A. Chirillo and Jennifer N. Bourne of the University of Texas, Austin.

The work was supported by the NIH and the Howard Hughes Medical Institute.

* Our memories and thoughts are the result of patterns of electrical and chemical activity in the brain. A key part of the activity happens when branches of neurons, much like electrical wire, interact at certain junctions, known as synapses. An output ‘wire’ (an axon) from one neuron connects to an input ‘wire’ (a dendrite) of a second neuron. Signals travel across the synapse as chemicals called neurotransmitters to tell the receiving neuron whether to convey an electrical signal to other neurons. Each neuron can have thousands of these synapses with thousands of other neurons. Synapses are still a mystery, though their dysfunction can cause a range of neurological diseases. Larger synapses — with more surface area and vesicles of neurotransmitters — are stronger, making them more likely to activate their surrounding neurons than medium or small synapses.

UPDATE 1/22/2016 “in the same ballpark as the World Wide Web” removed; appears to be inaccurate. The Internet Archive, a subset of the Web, currently stores 50 petabytes, for example.


Salk Institute | Salk scientists computationally reconstructed brain tissue in the hippocampus to study the sizes of connections (synapses). The larger the synapse, the more likely the neuron will send a signal to a neighboring neuron. The team found that there are actually 26 discrete sizes that can change over a span of a few minutes, meaning that the brain has a far great capacity at storing information than previous


Abstract of Nanoconnectomic upper bound on the variability of synaptic plasticity

Information in a computer is quantified by the number of bits that can be stored and recovered. An important question about the brain is how much information can be stored at a synapse through synaptic plasticity, which depends on the history of probabilistic synaptic activity. The strong correlation between size and efficacy of a synapse allowed us to estimate the variability of synaptic plasticity. In an EM reconstruction of hippocampal neuropil we found single axons making two or more synaptic contacts onto the same dendrites, having shared histories of presynaptic and postsynaptic activity. The spine heads and neck diameters, but not neck lengths, of these pairs were nearly identical in size. We found that there is a minimum of 26 distinguishable synaptic strengths, corresponding to storing 4.7 bits of information at each synapse. Because of stochastic variability of synaptic activation the observed precision requires averaging activity over several minutes.

Can human-machine superintelligence solve the world’s most dire problems?


Human Computation Institute | Dr. Pietro Michelucci

“Human computation” — combining human and computer intelligence in crowd-powered systems — might be what we need to solve the “wicked” problems of the world, such as climate change and geopolitical conflict, say researchers from the Human Computation Institute (HCI) and Cornell University.

In an article published in the journal Science, the authors present a new vision of human computation that takes on hard problems that until recently have remained out of reach.

Humans surpass machines at many things, ranging from visual pattern recognition to creative abstraction. And with the help of computers, these cognitive abilities can be effectively combined into multidimensional collaborative networks that achieve what traditional problem-solving cannot, the authors say.

Microtasking

Microtasking: Crowdsourcing breaks large tasks down into microtasks, which can be things at which humans excel, like classifying images. The microtasks are delivered to a large crowd via a user-friendly interface, and the data are aggregated for further processing. (credit: Pietro Michelucci and Janis L. Dickinson/Science)

Most of today’s human-computation systems rely on “microtasking” — sending “micro-tasks” to many individuals and then stitching together the results. For example, 165,000 volunteers in EyeWire have analyzed thousands of images online to help build the world’s most complete map of human retinal neurons.

Another example is reCAPTCHA, a Web widget used by 100 million people a day when they transcribe distorted text into a box to prove they are human.

“Microtasking is well suited to problems that can be addressed by repeatedly applying the same simple process to each part of a larger data set, such as stitching together photographs contributed by residents to decide where to drop water during a forest fire,” the authors note.

But this microtasking approach alone cannot address the tough challenges we face today, say the authors. “A radically new approach is needed to solve ‘wicked problems’ — those that involve many interacting systems that are constantly changing, and whose solutions have unforeseen consequences, such as climate change, disease, and geopolitical conflict, which are dynamic, involve multiple, interacting systems, and have non-obvious secondary effects, such as political exploitation of a pandemic crisis.”

New human-computation technologies

New human-computation technologies: In creating problem-solving ecosystems, researchers are beginning to explore how to combine the cognitive processing of many human contributors with machine-based computing to build faithful models of the complex, interdependent systems that underlie the world’s most challenging problems. (credit: Pietro Michelucci and Janis L. Dickinson/Science)

The authors say new human computation technologies can help build flexible collaborative environments. Recent techniques provide real-time access to crowd-based inputs, where individual contributions can be processed by a computer and sent to the next person for improvement or analysis of a different kind.

This idea is already taking shape in several human-computation projects:

  • YardMap.org, launched by the Cornell in 2012, maps global conservation efforts. It allows participants to interact and build on each other’s work — something that crowdsourcing alone cannot achieve.
  • WeCureAlz.com accelerates Cornell-based Alzheimer’s disease research by combining two successful microtasking systems into an interactive analytic pipeline that builds blood-flow models of mouse brains. The stardust@home system, which was used to search for comet dust in one million images of aerogel, is being adapted to identify stalled blood vessels, which will then be pinpointed in the brain by a modified version of the EyeWire system.

“By enabling members of the general public to play some simple online game, we expect to reduce the time to treatment discovery from decades to just a few years,” says HCI director and lead author, Pietro Michelucci, PhD. “This gives an opportunity for anyone, including the tech-savvy generation of caregivers and early stage AD patients, to take the matter into their own hands.”


Abstract of The power of crowds

Human computation, a term introduced by Luis von Ahn, refers to distributed systems that combine the strengths of humans and computers to accomplish tasks that neither can do alone. The seminal example is reCAPTCHA, a Web widget used by 100 million people a day when they transcribe distorted text into a box to prove they are human. This free cognitive labor provides users with access to Web content and keeps websites safe from spam attacks, while feeding into a massive, crowd-powered transcription engine that has digitized 13 million articles from The New York Times archives. But perhaps the best known example of human computation is Wikipedia. Despite initial concerns about accuracy, it has become the key resource for all kinds of basic information. Information science has begun to build on these early successes, demonstrating the potential to evolve human computation systems that can model and address wicked problems (those that defy traditional problem-solving methods) at the intersection of economic, environmental, and sociopolitical systems.

Optoelectronic microprocessors shown to dramatically reduce chips’ power consumption

Researchers have produced a working optoelectronic chip that computes electronically but uses light to move information. The chip has 850 optical components and 70 million transistors, which, while significantly less than the billion-odd transistors of a typical microprocessor, is enough to demonstrate all the functionality that a commercial optical chip would require. (credit: Glenn J. Asakawa)

Rsearchers at MIT, the University of California at Berkeley, and the University of Colorado have produced a working optoelectronic microprocessor, which computes electronically but uses light to move information — using only processes found in existing microchip fabrication facilities.

Optical communication could dramatically reduce chips’ power consumption, which is essential to maintaining the steady increases in computing power that we’ve come to expect.

Demonstrating that optical chips can be built with no alteration to existing semiconductor manufacturing processes should make optical communication more attractive to the computer industry. But it also makes an already daunting engineering challenge even more difficult.

“You have to use new physics and new designs to figure out how you take ingredients and process recipes that are used to make transistors, and use those to make photodetectors, light modulators, waveguides, optical filters, and optical interfaces,” says MIT professor of electrical engineering Rajeev Ram, referring to the optical components necessary to encode data onto different wavelengths of light, transmit it across a chip, and then decode it.

Powering down

Block diagram of the optical memory system. The system uses one chip acting as the processor and the other acting as memory, connected by a full-duplex optical link with a round-trip distance of 20 m by fiber. PD, photodetector.

The chip has 850 optical components and 70 million transistors, which, while significantly less than the billion-odd transistors of a typical microprocessor, is enough to demonstrate all the functionality that a commercial optical chip would require. In tests, the researchers found that the performance of their transistors was virtually indistinguishable from that of all-electronic computing devices built in the same facility.*

Computer chips are constantly shipping data back and forth between logic circuits and memory, and today’s chips cannot keep the logic circuits supplied with enough data to take advantage of their ever-increasing speed. Boosting the bandwidth of the electrical connections between logic and memory would require more power, and that would raise the chips’ operating temperatures to unsustainable levels.

Optical data connections are, in principle, much more energy efficient. And unlike electrical connections, their power requirements don’t increase dramatically with distance. So optical connections could link processors that were meters rather than micrometers apart, with little loss in performance.

The new paper “certainly is an important result,” says Jagdeep Shah, a researcher at the U.S. Department of Defense’s Institute for Defense Analyses who, as a program director at the Defense Advanced Research Project Agency, initiated the program that sponsored the researchers’ work. “It is not at the megascale yet, and there are steps that need to be taken in order to get there. But this is a good step in that direction.”

“I think that the [chipmaker] GlobalFoundries process was an industry-standard 45-nanometer design-rule process,” Shah adds. “I don’t think that there need be any concern that there’s any foundry that can’t make these things.”

The paper in Nature describing the new chip has 22 co-authors.

* One of the difficulties in using transistor-manufacturing processes to produce optical devices is that transistor components are intended to conduct electricity, at least some of the time. But conductivity requires free charge carriers, which tend to absorb light particles, limiting optical transmission.

Computer chips, however, generally use both negative charge carriers — electrons — and positive charge carriers — “holes,” or the absence of an electron where one would be expected. “That means that somewhere in there, there should be some way to block every kind of [carrier] implant that they’re doing for every layer,” Ram explains. “We just had to figure out how we do that.”

In an optoelectronic chip, at some point, light signals have to be converted to electricity. But contact with metal also interferes with optical data transmission. The researchers found a way to pattern metal onto the inner ring of a donut-shaped optical component called a ring resonator. The metal doesn’t interact with light traveling around the resonator’s outer ring, but when a voltage is applied to it, it can either modify the optical properties of the resonator or register changes in a data-carrying light signal, allowing it to translate back and forth between optical and electrical signals.

On the new chip, the researchers demonstrated light detectors built from these ring resonators that are so sensitive that they could get the energy cost of transmitting a bit of information down to about a picojoule, or one-tenth of what all-electronic chips require, even over very short distances.

The researchers’ chip was manufactured by GlobalFoundries, a semiconductor manufacturing company that uses a silicon-on-insulator process, meaning that in its products, layers of silicon are insulated by layers of glass. The researchers build their waveguides — the optical components that guide light — atop a thin layer of glass on a silicon wafer. Then they etch away the silicon beneath them. The difference in refractive index — the degree to which a material bends light — between the silicon and the glass helps contain light traveling through the waveguides.


Abstract of Single-chip microprocessor that communicates directly using light

Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems—from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic–photonic systems enabled by silicon-based nanophotonic devices. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic–photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic–photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a ‘zero-change’ approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic–photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

AI ‘alarmists’ nominated for 2015 ‘Luddite Award’

An 1844 engraving showing a post-1820s Jacquard loom (credit: public domain/Penny Magazine)

The Information Technology and Innovation Foundation (ITIF) today (Dec. 21) announced 10 nominees for its 2015 Luddite Award. The annual “honor” recognizes the year’s most egregious example of a government, organization, or individual stymieing the progress of technological innovation.

ITIF also opened an online poll and invited the public to help decide the “winner.” The result will be announced in late January.

The nominees include (in no specific order):

1. Alarmists, including respected luminaries such as Elon Musk, Stephen Hawking, and Bill Gates, touting an artificial- intelligence apocalypse.

2. Advocates, including Hawking and Noam Chomsky, seeking a ban on “killer robots.”

3. Vermont and other states limiting automatic license plate readers.

4. Europe, China, and others choosing taxi drivers over car-sharing passengers.

5. The U.S. paper industry opposing e-labeling.

6. California’s governor vetoing RFID tags in driver’s licenses.

7. Wyoming effectively outlawing citizen science.

8. The Federal Communications Commission limiting broadband innovation.

9. The Center for Food Safety fighting genetically improved food.

10. Ohio and other states banning red light cameras.

‘Paranoia about evil machines’

(credit: Paramount Pictures)

“Just as Ned Ludd wanted to smash mechanized looms and halt industrial progress in the 19th century, today’s neo-Luddites want to foil technological innovation to the detriment of the rest of society,” said Robert D. Atkinson, ITIF’s founder and president.

“If we want a world in which innovation thrives, then everyone’s New Year’s resolution should be to replace neo-Luddism with an attitude of risk-taking and faith in the future.”

Atkinson notes that “paranoia about evil machines has swirled around in popular culture for more than 200 years, and these claims continue to grip the popular imagination, in no small part because these apocalyptic ideas are widely represented in books, movies, and music.

“The last year alone saw blockbuster films with a parade of digital villains, such as Avengers: Age of Ultron, Ex Machina, and Terminator: Genisys.”

He also cites statements in Oxford professor Nick Bostrom’s book Superintelligence: Paths, Dangers, Strategies, “reflecting the general fear that ‘superintelligence’ in machines could outperform ‘the best human minds in every field, including scientific creativity, general wisdom and social skills.’ Bostrom argues that artificial intelligence will advance to a point where its goals are no longer compatible with that of humans and, as a result, superintelligent machines will seek to enslave or exterminate us.”

“Raising such sci-fi doomsday scenarios just makes it harder for the public, policymakers,  and scientists to support more funding for AI research, Atkinson concludes. “Indeed, continuing the negative campaign against artificial intelligence could potentially dry up funding for AI research, other than money for how to control, rather than enable AI. What legislator wants to be known as ‘the godfather of the technology that destroyed the human race’?”

Not mentioned in the ITIF statement is the recently announced non-profit “OpenAI” research company founded by Elon Musk and associates, committing $1 billion toward their goal to advance digital intelligence in the way that is most likely to benefit humanity as a whole.”

The 2014 Luddite Award winners

The winners last year: the states of Arizona, Michigan, New Jersey, and Texas, for taking action to prevent Tesla from opening stores in their states to sell cars directly to consumers. Other nominees included:

  • National Rifle Association (NRA) for its opposition to smart guns
  • “Stop Smart Meters” Seeks To Stop Smart Innovation in Meters and Cars
  • Free Press Lobbies for Rules to Stop Innovation in Broadband Networks
  • The Media and Pundits Claiming That “Robots” Are Killing Jobs.

 

 

Deep-learning algorithm predicts photos’ memorability at ‘near-human’ levels

The MemNet algorithm ranks images by how memorable and forgettable they are. It also creates a heat map (second image from left) identifying the image’s most memorable and forgettable regions, ranging from red (most memorable) to blue (most forgettable). The image can then be subtly tweaked to increase or decrease its memorability score (three images on right). (credit: CSAIL)

Researchers at MIT’s Computer Science and Artificial Intelligence Laboratory (CSAIL) have developed a deep-learning algorithm that can predict how memorable or forgettable an image is almost as accurately as humans, and they plan to turn it into an app that tweaks photos to make them more memorable.

For each photo, the “MemNet” algorithm also creates a “heat map” (a color-coded overlay) that identifies exactly which parts of the image are most memorable. You can try it out online by uploading your own photos to the project’s “LaMem” dataset.

The research is an extension of a similar algorithm the team developed for facial memorability. The team fed its algorithm tens of thousands of images from several different datasets developed at CSAIL, including LaMem and the scene-oriented SUN and Places. The images had each received a “memorability score” based on the ability of human subjects to remember them in online experiments.

Close to human performance

The team then pitted its algorithm against human subjects by having the model predicting how memorable a group of people would find a new never-before-seen image. It performed 30 percent better than existing algorithms and was within a few percentage points of the average human performance.

By emphasizing different regions, the algorithm can also potentially increase the image’s memorability.

“CSAIL researchers have done such manipulations with faces, but I’m impressed that they have been able to extend it to generic images,” says Alexei Efros, an associate professor of computer science at the University of California at Berkeley. “While you can somewhat easily change the appearance of a face by, say, making it more ‘smiley,’ it is significantly harder to generalize about all image types.”

LaMem is the world’s largest image-memorability dataset. With 60,000 images, each annotated with detailed metadata about qualities such as popularity and emotional impact, LaMem is the team’s effort to spur further research on what they say has often been an under-studied topic in computer vision.

Team members picture a variety of potential applications, from improving the content of ads and social media posts, to developing more effective teaching resources, to creating your own personal “health-assistant” device to help you remember things. The team next plans to try to update the system to be able to predict the memory of a specific person, as well as to better tailor it for individual “expert industries” such as retail clothing and logo design.

The work is supported by grants from the National Science Foundation, as well as the McGovern Institute Neurotechnology Program, the MIT Big Data Initiative at CSAIL, research awards from Google and Xerox, and a hardware donation from Nvidia.


Abstract of Understanding and Predicting Image Memorability at a Large Scale

Progress in estimating visual memorability has been limited by the small scale and lack of variety of benchmark data. Here, we introduce a novel experimental procedure to objectively measure human memory, allowing us to build LaMem, the largest annotated image memorability dataset to date (containing 60,000 images from diverse sources). Using Convolutional Neural Networks (CNNs), we show that fine-tuned deep features outperform all other features by a large margin, reaching a rank correlation of 0.64, near human consistency (0.68). Analysis of the responses of the high-level CNN layers shows which objects and regions are positively, and negatively, correlated with memorability, allowing us to create memorability maps for each image and provide a concrete method to perform image memorability manipulation. This work demonstrates that one can now robustly estimate the memorability of images from many different classes, positioning memorability and deep memorability features as prime candidates to estimate the utility of information for cognitive systems. Our model and data are available at: http://memorability.csail.mit.edu

Will this DNA molecular switch replace conventional transistors?

A model of one form of double-stranded DNA attached to two electrodes (credit: UC Davis)

What do you call a DNA molecule that changes between high and low electrical conductance (amount of current flow)?

Answer: a molecular switch (transistor) for nanoscale computing. That’s what a team of researchers from the University of California, Davis and the University of Washington have documented in a paper published in Nature Communications Dec. 9.

“As electronics get smaller they are becoming more difficult and expensive to manufacture, but DNA-based devices could be designed from the bottom-up using directed self-assembly techniques such as ‘DNA origami’,” said Josh Hihath, assistant professor of electrical and computer engineering at UC Davis and senior author on the paper.

DNA origami is the folding of DNA to create two- and three-dimensional shapes at the nanoscale level (see DNA origami articles on KurzweilAI).

Hihath suggests that DNA-based devices may also improve the energy efficiency of electronic circuits, compared to traditional transistors, where power density on-chip has increased as transistors have become miniaturized, limiting further miniaturization.

This illustration shows double-stranded DNA in two configurations, B-form (blue) and A-form (green), bound to gold electrodes (yellow). The linkers to the electrodes (either amines or thiols) are shown in orange. (credit: Juan Manuel Artés et al./Nature Communications)

To develop DNA into a reversible switch, the scientists focused on switching between two stable conformations of DNA, known as the A-form and the B-form. In DNA, the B-form is the conventional DNA duplex molecule. The A-form is a more compact version with different spacing and tilting between the base pairs. Exposure to ethanol forces the DNA into the A-form conformation, resulting in increased conductance. Removing the ethanol causes the DNA to switch back to the B-form and return to its original reduced conductance value.

But the authors advise that to develop this finding into a technologically viable platform for electronics will require a great deal of work to overcome two major hurdles: billions of active DNA molecular devices must be integrated into the same circuit, as is done currently in conventional electronics; and scientists must be able to gate specific devices individually in such a large system.


Abstract of Conformational gating of DNA conductance

DNA is a promising molecule for applications in molecular electronics because of its unique electronic and self-assembly properties. Here we report that the conductance of DNA duplexes increases by approximately one order of magnitude when its conformation is changed from the B-form to the A-form. This large conductance increase is fully reversible, and by controlling the chemical environment, the conductance can be repeatedly switched between the two values. The conductance of the two conformations displays weak length dependencies, as is expected for guanine-rich sequences, and can be fit with a coherence-corrected hopping model. These results are supported by ab initio electronic structure calculations that indicate that the highest occupied molecular orbital is more disperse in the A-form DNA case. These results demonstrate that DNA can behave as a promising molecular switch for molecular electronics applications and also provide additional insights into the huge dispersion of DNA conductance values found in the literature.

Skyscraper-style carbon-nanotube chip design ‘boosts electronic performance by factor of a thousand’

A new revolutionary high-rise architecture for computing (credit: Stanford University)

Researchers at Stanford and three other universities are creating a revolutionary new skyscraper-like high-rise architecture for computing based on carbon nanotube materials instead of silicon.

In Rebooting Computing, a special issue (in press) of the IEEE Computer journal, the team describes its new approach as “Nano-Engineered Computing Systems Technology,” or N3XT.

Suburban-style chip layouts create long commutes and regular traffic jams in electronic circuits, wasting time and energy, they note.

N3XT will break data bottlenecks by integrating processors and memory-like floors in a skyscraper and by connecting these components with millions of “vias,” which play the role of tiny electronic elevators.

The N3XT high-rise approach will move more data, much faster, using far less energy, than would be possible using low-rise circuits, according to the researchers.

Stanford researchers including Associate Professor Subhasish Mitra and Professor H.-S. Philip Wong have “assembled a group of top thinkers and advanced technologies to create a platform that can meet the computing demands of the future,” Mitra says.

“When you combine higher speed with lower energy use, N3XT systems outperform conventional approaches by a factor of a thousand,” Wong claims.

Carbon nanotube transistors

Engineers have previously tried to stack silicon chips but with limited success, the researchers suggest. Fabricating a silicon chip requires temperatures close to 1,800 degrees Fahrenheit, making it extremely challenging to build a silicon chip atop another without damaging the first layer. The current approach to what are called 3-D, or stacked, chips is to construct two silicon chips separately, then stack them and connect them with a few thousand wires.

But conventional 3-D silicon chips are still prone to traffic jams and it takes a lot of energy to push data through what are a relatively few connecting wires.

The N3XT team is taking a radically different approach: building layers of processors and memory directly atop one another, connected by millions of vias that can move more data over shorter distances that traditional wire, using less energy, and immersing computation and memory storage into an electronic super-device.

The key is the use of non-silicon materials that can be fabricated at much lower temperatures than silicon, so that processors can be built on top of memory without the new layer damaging the layer below. As in IBM’s recent chip breakthrough (see “Method to replace silicon with carbon nanotubes developed by IBM Research“), N3XT chips are based on carbon nanotube transistors.

Transistors are fundamental units of a computer processor, the tiny on-off switches that create digital zeroes and ones. CNTs are faster and more energy-efficient than silicon processors, and much thinner. Moreover, in the N3XT architecture, they can be fabricated and placed over and below other layers of memory.

Among the N3XT scholars working at this nexus of computation and memory are Christos Kozyrakis and Eric Pop of Stanford, Jeffrey Bokor and Jan Rabaey of the University of California, Berkeley, Igor Markov of the University of Michigan, and Franz Franchetti and Larry Pileggi of Carnegie Mellon University.

New storage technologies 

Team members also envision using data storage technologies that rely on materials other than silicon. This would allow for the new materials to be manufactured on top of CNTs, using low-temperature fabrication processes.

One such data storage technology is called resistive random-access memory, or RRAM (see “‘Memristors’ based on transparent electronics offer technology of the future“). Resistance slows down electrons, creating a zero, while conductivity allows electrons to flow, creating a one. Tiny jolts of electricity switch RRAM memory cells between these two digital states. N3XT team members are also experimenting with a variety of nanoscale magnetic storage materials.

Just as skyscrapers have ventilation systems, N3XT high-rise chip designs incorporate thermal cooling layers. This work, led by Stanford mechanical engineers Kenneth Goodson and Mehdi Asheghi, ensures that the heat rising from the stacked layers of electronics does not degrade overall system performance.

Mitra and Wong have already demonstrated a working prototype of a high-rise chip. At the International Electron Devices Meeting in December 2014 they unveiled a four-layered chip made up of two layers of RRAM memory sandwiched between two layers of CNTs (see “Stanford engineers invent radical ‘high-rise’ 3D chips“).

In their N3XT paper they ran simulations showing how their high-rise approach was a thousand times more efficient in carrying out many important and highly demanding industrial software applications.

 

 

Semantic Scholar uses AI to transform scientific search

Example of the top return in a Semantic Scholar search for “quantum computer silicon” constrained to overviews (52 out of 1,397 selected papers since 1989) (credit: AI2)

The Allen Institute for Artificial Intelligence (AI2) launched Monday (Nov. 2) its free Semantic Scholar service, intended to allow scientific researchers to quickly cull through the millions of scientific papers published each year to find those most relevant to their work.

Semantic Scholar leverages AI2’s expertise in data mining, natural-language processing, and computer vision, according to according to Oren Etzioni, PhD, CEO at AI2. At launch, the system searches more than three million computer science papers, and will add scientific categories on an ongoing basis.

With Semantic Scholar, computer scientists can:

  • Home in quickly on what they are looking for, with advanced selection filtering tools. Researchers can filter search results by author, publication, topic, and date published. This gets the researcher to the most relevant result in the fastest way possible, and reduces information overload.
  • Instantly access a paper’s figures and findings. Unique among scholarly search engines, this feature pulls out the graphic results, which are often what a researcher is really looking for.
  • Jump to cited papers and references and see how many researchers have cited each paper, a good way to determine citation influence and usefulness.
  • Be prompted with key phrases within each paper to winnow the search further.

Example of figures and tables extracted from the first document discovered (“Quantum computation and quantum information”) in the search above (credit: AI2)

How Semantic Scholar works

Using machine reading and vision methods, Semantic Scholar crawls the web, finding all PDFs of publicly available scientific papers on computer science topics, extracting both text and diagrams/captions, and indexing it all for future contextual retrieval.

Using natural language processing, the system identifies the top papers, extracts filtering information and topics, and sorts by what type of paper and how influential its citations are. It provides the scientist with a simple user interface (optimized for mobile) that maps to academic researchers’ expectations.

Filters such as topic, date of publication, author and where published are built in. It includes smart, contextual recommendations for further keyword filtering as well. Together, these search and discovery tools provide researchers with a quick way to separate wheat from chaff, and to find relevant papers in areas and topics that previously might not have occurred to them.

Semantic Scholar builds from the foundation of other research-paper search applications such as Google Scholar, adding AI methods to overcome information overload.

“Semantic Scholar is a first step toward AI-based discovery engines that will be able to connect the dots between disparate studies to identify novel hypotheses and suggest experiments that would otherwise be missed,” said Etzione. “Our goal is to enable researchers to find answers to some of science’s thorniest problems.”

How to build a full-scale quantum computer in silicon

Physical layout of the surface code* quantum computer. The system comprises three layers. The 2D donor qubit array resides in the middle layer. A mutually perpendicular (crisscross) pattern of control gates in the upper and lower planes form a regular 3D grid of cells. (credit: Charles D. Hill et al./Science Advances)

A new 3D silicon-chip architecture based on single-atom quantum bits has been designed by researchers at UNSW Australia (The University of New South Wales) and the University of Melbourne.

The use of silicon makes it compatible with existing atomic-scale fabrication techniques, providing a way to build a large-scale quantum computer.**

The scientists and engineers from the Australian Research Council Centre of Excellence for Quantum Computation and Communication Technology (CQC2T), headquartered at UNSW, previously demonstrated a fabrication strategy. But the hard part in scaling up to an operational quantum computer was the architecture: How to precisely control multiple qubits in parallel across an array of many thousands of qubits and constantly correct for quantum errors in calculations.

The CQC2T collaboration says they have now designed such a device. In a study published Friday (Oct. 30) in an open-access paper in Science Advances, the CQC2T team describes a new silicon architecture that uses atomic-scale qubits aligned to control lines (essentially very narrow wires) inside a 3D design.


UNSW | How to build a quantum computer in silicon

Error correction

Errors (caused by decoherence and other quantum noise) are endemic to quantum computing, so error correction protocols are essential in creating a practical system that can be scaled up to larger numbers of qubits.

“The great thing about this work, and architecture, is that it gives us an endpoint,” says UNSW Scientia Professor Michelle Simmons, study co-author and Director of the CQC2T. “We now know exactly what we need to do in the international race to get there.”

In the team’s conceptual design, they have moved from the conventional one-dimensional array (in a line) of qubits to a two-dimensional array (in a surface), which is far more tolerant of errors. This qubit layer is “sandwiched” between two layers of control wires arranged in a 3D grid.

By applying voltages to a subset of these wires, multiple qubits can be controlled in parallel, performing a series of operations using far fewer controls. They can also perform the 2D surface-code* error correction protocols, so any computational errors that creep into the calculation can be corrected faster than they occur.

The researchers believe their structure is scalable to millions of qubits, and that means they may be on the fast track to a full-scale quantum processor.

* “Surface code is a powerful quantum error correcting code that can be defined on a 2D square lattice of qubits with only nearest neighbor interactions.” — Austin G. Fowler et al. Surface code quantum error correction incorporating accurate error propagation. arXiv, 4/2010

** In classical computers, data is rendered as binary bits, which are always in one of two states: 0 or 1. However, a qubit can exist in both of these states at once, a condition known as a superposition. A qubit operation exploits this quantum weirdness by allowing many computations to be performed in parallel (a two-qubit system performs the operation on 4 values, a three-qubit system on 8, and so on). As a result, quantum computers will far exceed today’s most powerful supercomputers, and offer enormous advantages for a range of complex problems, such as rapidly scouring vast databases, modeling financial markets, optimizing huge metropolitan transport networks, and modeling complex biological molecules.


Abstract of A surface code quantum computer in silicon

The exceptionally long quantum coherence times of phosphorus donor nuclear spin qubits in silicon, coupled with the proven scalability of silicon-based nano-electronics, make them attractive candidates for large-scale quantum computing. However, the high threshold of topological quantum error correction can only be captured in a two-dimensional array of qubits operating synchronously and in parallel—posing formidable fabrication and control challenges. We present an architecture that addresses these problems through a novel shared-control paradigm that is particularly suited to the natural uniformity of the phosphorus donor nuclear spin qubit states and electronic confinement. The architecture comprises a two-dimensional lattice of donor qubits sandwiched between two vertically separated control layers forming a mutually perpendicular crisscross gate array. Shared-control lines facilitate loading/unloading of single electrons to specific donors, thereby activating multiple qubits in parallel across the array on which the required operations for surface code quantum error correction are carried out by global spin control. The complexities of independent qubit control, wave function engineering, and ad hoc quantum interconnects are explicitly avoided. With many of the basic elements of fabrication and control based on demonstrated techniques and with simulated quantum operation below the surface code error threshold, the architecture represents a new pathway for large-scale quantum information processing in silicon and potentially in other qubit systems where uniformity can be exploited.